Security Threats and Countermeasures in Three-Dimensional Integrated Circuits

被引:15
作者
Dofe, Jaya [1 ]
Gu, Peng [2 ]
Stow, Dylan [2 ]
Yu, Qiaoyan [1 ]
Kursun, Eren [3 ]
Xie, Yuan [2 ]
机构
[1] Univ New Hampshire, Dept Elect & Comp Engn, Durham, NH 03824 USA
[2] Univ Calif Santa Barbara, Dept Elect & Comp Engn, Santa Barbara, CA 93106 USA
[3] Columbia Univ, Dept Comp Sci, New York, NY 10027 USA
来源
PROCEEDINGS OF THE GREAT LAKES SYMPOSIUM ON VLSI 2017 (GLSVLSI' 17) | 2017年
关键词
D O I
10.1145/3060403.3060500
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Existing works on Three-dimensional (3D) hardware security focus on leveraging the unique 3D characteristics to address the supply chain attacks that exist in 2D design. However, 3D ICs introduce specific and unexplored challenges as well as new opportunities for managing hardware security. In this paper, we analyze new security threats unique to 3D ICs. The corresponding attack models are summarized for future research. Furthermore, existing representative countermeasures, including split manufacturing, camouflaging, transistor locking, techniques against thermal signal based side-channel attacks, and network-on-chip based shielding plane (NoCSIP) for different hardware threats are reviewed and categorized. Moreover, preliminary countermeasures are proposed to thwart TSV-based hardware Trojan insertion attacks.
引用
收藏
页码:321 / 326
页数:6
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