Floorplanning with Boundary Constraints by Using AE-TCG

被引：0

作者：

Li, YiMing ^{[1
]}

Zhou, MingTian ^{[1
]}

Li, Yi ^{[1
]}

机构：

[1] Univ Elect Sci & Technol China, Sch Comp Sci & Engn, Chengdu 610054, Peoples R China

来源：

INTERNATIONAL CONFERENCE ON GRAPHIC AND IMAGE PROCESSING (ICGIP 2012) | 2013年 / 8768卷

关键词：

design automation; computer aided design; floorplanning; transitive closure graph; area estimate; MODULE PLACEMENT; ALGORITHM; SEQUENCE;

D O I：

10.1117/12.2010850

中图分类号：

O43 [光学];

学科分类号：

070207 ; 0803 ;

摘要：

It is practical and crucial that a designer will want to control the positions of some modules along the chip boundary in the final packing for I/O connection. To solve the problem we propose an algorithm named Area Estimate Transitive Closure Graphs (AE-TCG). By analyzing the feasible condition of boundary constraints, AE-TCG guarantees that the result of each perturbation is a feasible placement with boundary constraints, and doesn't need to transform the infeasible solution to feasible one. Unlike most of the previous algorithms getting the target area after packing, AE-TCG can satisfy the boundary constraints and estimate the area of feasible placement without packing after random perturbation, then accept the beneficial perturbation. For the property of concentrate itself, AE-TCG is running without Simulated Annealing (SA) process. The experimental results show that AE-TCG is effective and efficient than other algorithms with boundary constraints in commonly used MCNC benchmark circuits.

引用

页数：7

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