An efficient hierarchical timing-driven steiner tree algorithm for global routing

被引:1
作者
Xu, JY [1 ]
Hong, XL [1 ]
Jing, T [1 ]
Cai, Y [1 ]
Gu, J [1 ]
机构
[1] Tsing Hua Univ, Dept Comp Sci & Technol, Beijing 100084, Peoples R China
来源
ASP-DAC/VLSI DESIGN 2002: 7TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE AND 15TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS | 2002年
关键词
D O I
10.1109/ASPDAC.2002.994965
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, we propose a hierarchical timing-driven Steiner tree algorithm for global routing which considers the minimization of timing, delay during the tree construction as the goal. The algorithm uses heuristic approach to decompose the problem of minimum delay Steiner free into hierarchy and to construct the sub-trees respectively based on dynamic programming technique. Taking the net topology into consideration, we build the final routing tree by reconnecting, the sub-trees at each level recursively and then improve the connection with the objective of minimizing the delay from source to sink pins on the critical path. Meanwhile, some efficient strategies have been proposed to speed up the solving process. Experimental results are given to demonstrate the efficiency of the algorithm.
引用
收藏
页码:473 / 478
页数:4
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