Real-Time Implementation of a 31-Level Asymmetrical Cascaded Multilevel Inverter for Dynamic Loads

被引:31
作者
Dhanamjayulu, C. [1 ]
Arunkumar, G. [1 ]
Pandian, B. Jaganatha [1 ]
Kumar, C. V. Ravi [1 ]
Kumar, M. Praveen [1 ]
Jerin, A. Rini Ann [1 ]
Venugopal, P. [1 ]
机构
[1] Vellore Inst Technol, Sch Elect Engn, Vellore 632014, Tamil Nadu, India
关键词
Multilevel inverter (MLI); total harmonic distraction (THD); staircase modulation technique; REDUCED NUMBER; HYBRID; COMPONENTS; CONVERTER; TOPOLOGY;
D O I
10.1109/ACCESS.2019.2909831
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Among the renewable energy applications, the most popular inverters are cascaded multilevel inverters. Irrespective of numerous benefits these inverters face reliability issues due to the presence of more circuit components in the design. This has been a critical challenge for researchers in designing inverters with enhanced reliability by reducing the total harmonic distortion (THD). This paper proposes a 31-level asymmetric cascaded multilevel inverter for renewable energy applications. The proposed topology produces waveforms consisting of the staircase with a high number of output levels with lesser components with low THD. The investigations on the feasibility and performance of MLI under steady-state, transient, and dynamic load disturbances. The results are validated from a 1.6kW system which provides the proposed inverter.
引用
收藏
页码:51254 / 51266
页数:13
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