High-Speed FPGA Configuration and Testing Through JTAG

被引：0
作者：
Gruwell, Ammon [1 ]
Zabriskie, Peter [1 ]
Wirthlin, Michael [1 ]
机构：
[1] Brigham Young Univ, Dept Elect & Comp Engn, NSF Ctr High Performance Reconfigurable Comp CHRE, Provo, UT 84602 USA
来源：
2016 IEEE AUTOTESTCON PROCEEDINGS | 2016年
关键词：
D O I：
暂无
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
Since most FPGAs use the universal JTAG port to support configuration memory access, hardware and software tools are needed to maximize the speed of FPGA configuration management over JTAG. This paper introduces a tool called the JTAG Configuration Manager (JCM) that enables high-speed programmable access to the configuration memory of FPGAs through JTAG. This tool consists of a linux-based software library running on an embedded ARM processor paired with a hardware JTAG controller module implemented in programmable logic. This JTAG controller optimizes the speed and timing of JTAG transactions over cables of any length using an automatic speed calibration process. This JTAG interface enables custom configuration sequences to be sent at high speeds. The JCM also has access to all JTAG interfaces of the FPGA including temperature monitoring and internal Boundary SCAN, making it useful for many testing and verification applications.
引用
收藏
页数：8
相关论文
共 19 条
[11]  
Nazar G. L., 2012, 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT 2012), P152, DOI 10.1109/DFT.2012.6378216
[12]   Fault Injection in Modern Microprocessors Using On-Chip Debugging Infrastructures [J].
Portela-Garcia, Marta ;
Lopez-Ongil, Celia ;
Garcia Valderas, Mario ;
Entrena, Luis .
IEEE TRANSACTIONS ON DEPENDABLE AND SECURE COMPUTING, 2011, 8 (02) :308-314
[13]   A Test Methodology for Determining Space Readiness of Xilinx SRAM-Based FPGA Devices and Designs [J].
Quinn, Heather M. ;
Graham, Paul S. ;
Wirthlin, Michael J. ;
Pratt, Brian ;
Morgan, Keith S. ;
Caffrey, Michael P. ;
Krone, James B. .
IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, 2009, 58 (10) :3380-3395
[14]  
Straka M., 2011, Proceedings of the 2011 14th Euromicro Conference on Digital System Design. Architectures, Methods and Tools. (DSD 2011), P223, DOI 10.1109/DSD.2011.32
[15]  
Xilinx, 2015, XIL VIRT CABL RUNN Z
[16]  
Xilinx, 2012, CHIPSCOPE PROS COR
[17]  
Xilinx, 2015, PLATF CABL USB 2
[18]  
Xilinx, 2014, VIV DES SUIT TCL COM
[19]  
Xilinx, 2009, CONF PROGR OV
12