Enhanced switched-current comparator

Practical techniques for accuracy and speed enhancement in switched-current (ST) comparators are presented. Both techniques require minimum added complexity and, more importantly, possess no performance penalty for the comparator in terms of noise and power. Extensive simulations indicate an enhanced SI comparator with an improvement in resolution of > 2.5bit/s and a speed increase of a factor of 1.35 over those of the basic SI comparator. This makes it feasible for the implemention of an SI comparator with > 8.5bit resolution at an operating speed of > 270MHz for a power consumption of < 1.7mW.