A Physical Verification Methodology for 3D-ICs Using Inductive Coupling

We propose a physical verification methodology for 3D-ICs utilizing inductive coupling that includes a verification of the coil polarity and the distance between communicating coils. Additional layout layers are placed on the coils and then verification is done by a program written in SKILL. The proposed method also supports the rotation, flipping, and offset of the stacked chips. By using the proposed methodology in conjunction with commercial verification tools for 3D-ICs, the design efficiency of inductively coupled 3D-ICs is dramatically improved.