Petiroc and Citiroc: front-end ASICs for SiPM read-out and ToF applications

被引:53
作者
Fleury, J. [1 ]
Callier, S. [2 ]
de La Taille, C. [2 ]
Seguin, N. [2 ]
Thienpont, D. [2 ]
Dulucq, F. [2 ]
Ahmad, S. [1 ]
Martin, G. [2 ]
机构
[1] Weeroc SAS, F-91400 Orsay, France
[2] Ecole Polytech, Omega IN2P3, F-91128 Palaiseau, France
关键词
VLSI circuits; Analogue electronic circuits; Front-end electronics for detector readout;
D O I
10.1088/1748-0221/9/01/C01049
中图分类号
TH7 [仪器、仪表];
学科分类号
0804 ; 080401 ; 081102 ;
摘要
Petiroc and Citiroc are the two latest ASIC from Weeroc dedicated to SiPM read-out. Petiroc is a 16-channel front-end ASIC designed to readout silicon photomultipliers (SiPMs) for particle time-of-flight measurement applications. It combines a very fast and low-jitter trigger with an accurate charge measurement. Citiroc is a 32-channel front-end ASIC designed to readout silicon photo-multipliers (SiPM). It allows triggering down to 1/3 pe and provides the charge measurement with a good noise rejection. Moreover, Citiroc outputs the 32-channel triggers with a high accuracy (100 ps). Each channel of both ASICs combines a trigger path with an accurate charge measurement path. An adjustment of the SiPM high voltage is possible using a channel-by-channel input DAC. That allows a fine SiPM gain and dark noise adjustment at the system level to correct for the non-uniformity of SiPMs. Timing measurement down to 16 ps RMS jitter for Petiroc and 100 ps RMS for Citiroc is possible along with 1% linearity energy measurement up to 2500 pe. The power consumption is around 3.5 mW/channel for Petiroc and 3 mW/channel for Citiroc, excluding ASICs outing buffer.
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页数:9
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Callier, Stephane ;
de La Taille, Christophe ;
Martin-Chassard, Gisele ;
Raux, Ludovic .
PROCEEDINGS OF THE 2ND INTERNATIONAL CONFERENCE ON TECHNOLOGY AND INSTRUMENTATION IN PARTICLE PHYSICS (TIPP 2011), 2012, 37 :1569-1576