A CMOS high-speed imaging system design based on FPGA

被引:0
作者
Tang, Hong [1 ,2 ]
Wang, Huawei [1 ]
Cao, Jianzhong [1 ]
Qiao, Mingrui [1 ]
机构
[1] Chinese Acad Sci, Xian Inst Opt & Precis Mech, Xian, Peoples R China
[2] Univ Chinese Acad Sci, Beijing, Peoples R China
来源
AOPC 2015: IMAGE PROCESSING AND ANALYSIS | 2015年 / 9675卷
关键词
CMOS; FPGA; High-speed imaging; system design; driven design;
D O I
10.1117/12.2199529
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
CMOS sensors have more advantages than traditional CCD sensors. The imaging system based on CMOS has become a hot spot in research and development. In order to achieve the real-time data acquisition and high-speed transmission, we design a high-speed CMOS imaging system on account of FPGA. The core control chip of this system is XC6SL75T and we take advantages of CameraLink interface and AM41V4 CMOS image sensors to transmit and acquire image data. AM41V4 is a 4 Megapixel High speed 500 frames per second CMOS image sensor with global shutter and 4/3" optical format. The sensor uses column parallel A/D converters to digitize the images. The CameraLink interface adopts DS90CR287 and it can convert 28 bits of LVCMOS/LVTTL data into four LVDS data stream. The reflected light of objects is photographed by the CMOS detectors. CMOS sensors convert the light to electronic signals and then send them to FPGA. FPGA processes data it received and transmits them to upper computer which has acquisition cards through CameraLink interface configured as full models. Then PC will store, visualize and process images later. The structure and principle of the system are both explained in this paper and this paper introduces the hardware and software design of the system. FPGA introduces the driven clock of CMOS. The data in CMOS is converted to LVDS signals and then transmitted to the data acquisition cards. After simulation, the paper presents a row transfer timing sequence of CMOS. The system realized real-time image acquisition and external controls.
引用
收藏
页数:5
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