A Compact Drain Current Model for Thin-Film Transistor Under Bias Stress Condition

被引:3
作者
Garcia, Rodolfo [1 ]
Mejia, Israel [2 ]
Tinoco, Julio [3 ]
Ezequiel Molinar-Solis, Jesus [4 ]
Morales, Alejandra [1 ]
Aleman, Miguel [5 ]
Sandoval, Sergio [4 ]
Quevedo-Lopez, Manuel A. [2 ]
机构
[1] Univ Autonoma Estado Mexico, Univ Ctr UAEM Ecatepec, Ecatepec De Morelos 55020, Mexico
[2] Univ Texas Dallas, Dept Mat Sci & Engn, Richardson, TX 75080 USA
[3] Univ Veracruzana, Micro & Nanotechnol Res Ctr, Boca Del Rio 94294, Mexico
[4] Inst Tecnol Ciudad Guzman, Guzman 49100, Mexico
[5] Inst Politecn Nacl, Mexico City Cdmx 07738, Mexico
基金
美国国家科学基金会;
关键词
Bias stress; channel conductivity; current instability; modeling; thin-film transistor (TFT); trapped charge; DEGRADATION; INSTABILITY; CIRCUIT; TFTS;
D O I
10.1109/TED.2018.2818694
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Several basic thin-film transistor (TFT) models have been developed to describe the electrical characteristics of the device, most of them only considering the fundamental instability effects during static mode operation. However, representing the dynamic behavior is also a major concern for circuit design due to the electrical stress changes over time. Under this scenario, empirical models have been previously demonstrated to reproduce the current instability effects under specific conditions, but they do not consider in detail the phenomena taking place when the TFT is under dynamic electrical stress. In this paper, a new semianalytical model is presented to describe the dynamical behavior of the TFT under stress. This model considers the impact of the negative charge trapped at interfacial states as well as the mobility degradation. To validate the model, we compare the results with experimental measurements from our group, (using CdS TFT), and other semiconductor TFTs (a-Si: H, SnO, IZO, and IGZO) reported by other authors.
引用
收藏
页码:1803 / 1809
页数:7
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