Demonstration and analysis of accumulation-mode double-gate metal-oxide-semiconductor field-effect transistor

被引:4
作者
Masahara, Meishoku [1 ]
Endo, Kazuhiko [1 ]
Liu, Yongxun [1 ]
Matsukawa, Takashi [1 ]
O'uchi, Shinichi [1 ]
Ishii, Kenichi [1 ]
Sugimata, Etsuro [1 ]
Suzuki, Eiichi [1 ]
机构
[1] Natl Inst Adv Ind Sci & Technol, Nanoelect Res Inst, Tsukuba, Ibaraki 3058568, Japan
来源
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS | 2006年 / 45卷 / 4B期
关键词
vertical DG-MOSFET; accumulation mode; inversion mode; channel thickness; channel body doping concentration; short-channel effects; subthreshold slope; threshold voltage;
D O I
10.1143/JJAP.45.3079
中图分类号
O59 [应用物理学];
学科分类号
摘要
The property of an accumulation-mode double-gate (DG) metal-oxide-semiconductor field-effect transistor (MOSFET) has thoroughly been investigated on the basis of experimental data and simulation results. Both accumulation- and inversion-mode DG-MOSFETs have been fabricated by novel vertical DG-MOSFET fabrication process technology. It is experimentally demonstrated that accumulation- mode DG-MOSFETs show a severe influence of channel thickness (T-Si) on threshold voltage (V-th) and subthreshold slope (S) as compared with inversion-mode ones. By decreasing T-Si, however, S is dramatically improved to the same value as that for the inversion-mode one. The short-channel effects (SCEs) for the accumulation-mode DG-MOSFETs have been explored using device simulation. The simulation result shows that, by decreasing T-Si to 10 nm, the trend of the SCEs for the accumulation-mode DG-MOSFETs becomes the same as that for the inversion-mode one down to an effective gate length of 10 nm. It is also demonstrated that, by using n(+)-DGs, an appropriate Vth as well as a low S can be attained for an accumulation-mode PMOS vertical DG-MOSFET.
引用
收藏
页码:3079 / 3083
页数:5
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