A Flexible Hardware Architecture for Wavelet Packet Transform With Arbitrary Tree Structure

被引：7

作者：

Garcia, Domingo ^{[1
]}

Mansour, Mohamed ^{[1
]}

Ali, Murtaza ^{[1
]}

机构：

[1] Texas Instruments Inc, Syst & Applicat R&D Ctr, Dallas, TX 75243 USA

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | 2013年 / 60卷 / 10期

关键词：

Application-specified integrated circuit (ASIC); sensor compression; wavelet packets; wavelet tree;

D O I：

10.1109/TCSII.2013.2277964

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We present a new hardware architecture for implementing the orthogonal wavelet packet transform with an arbitrary wavelet tree. The architecture is flexible enough to accommodate an arbitrary wavelet filter and an arbitrary tree up to a certain depth. The tree structure is specified through an efficient register parameterization architecture. We provide a detailed description of the different modules and complexity estimates for the application-specified integrated circuit implementation of the proposed architecture.

引用

页码：657 / 661

页数：5

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