Trellis-Based Extended Min-Sum Algorithm for Non-Binary LDPC Codes and its Hardware Structure

被引:83
作者
Li, Erbao [1 ]
Declercq, David [1 ]
Gunnam, Kiran [2 ]
机构
[1] Univ Cergy Pontoise, ENSEA, ETIS Lab, CNRS,UMR 8051, F-95000 Cergy Pontoise, France
[2] Nvidia Corp, Tegra Grp, Santa Clara, CA USA
基金
中国国家自然科学基金;
关键词
Extended min-sum; non-binary LDPC; message-passing decoder; trellis representation; hardware implementation; layered decoder; ARCHITECTURES; DESIGN; CHECK;
D O I
10.1109/TCOMM.2013.050813.120489
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, we present an improvement and a new implementation of a simplified decoding algorithm for non-binary low density parity-check codes (NB-LDPC) in Galois fields GF(q). The base algorithm that we use is the Extended Min-Sum (EMS) algorithm, which has been widely studied in the recent literature, and has been shown to approach the performance of the belief propagation (BP) algorithm, with limited complexity. In our work, we propose a new way to compute modified configuration sets, using a trellis representation of incoming messages to check nodes. We call our modification of the EMS algorithm trellis-EMS (T-EMS). In the T-EMS, the algorithm operates directly on the deviation space by considering a trellis built from differential messages, which serves as a new reliability measure to sort the configurations. We show that this new trellis representation reduces the computational complexity, without any performance degradation. In addition, we show that our modifications of the algorithm allows to greatly reduce the decoding latency, by using a larger degree of hardware parallelization.
引用
收藏
页码:2600 / 2611
页数:12
相关论文
共 30 条
[1]   High Speed Architectures for Finding the First two Maximum/Minimum Values [J].
Amaru, Luca G. ;
Martina, Maurizio ;
Masera, Guido .
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2012, 20 (12) :2342-2346
[2]  
[Anonymous], 1963, Low-Density Parity-Check Codes
[3]   Bubble check: a simplified algorithm for elementary check node processing in extended min-sum non-binary LDPC decoders [J].
Boutillon, E. ;
Conde-Canencia, L. .
ELECTRONICS LETTERS, 2010, 46 (09) :633-U51
[4]   High-Throughput Efficient Non-Binary LDPC Decoder Based on the Simplified Min-Sum Algorithm [J].
Chen, Xiaoheng ;
Wang, Chung-Li .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2012, 59 (11) :2784-2794
[5]   Low-Density Parity Check Codes over GF (q) [J].
Davey, Matthew C. ;
MacKay, David .
IEEE COMMUNICATIONS LETTERS, 1998, 2 (06) :165-167
[6]   Decoding algorithms for nonbinary LDPC codes over GF(q) [J].
Declercq, David ;
Fossorier, Marc .
IEEE TRANSACTIONS ON COMMUNICATIONS, 2007, 55 (04) :633-643
[7]  
Erbao Li, 2011, 2011 8th International Symposium on Wireless Communication Systems, P46, DOI 10.1109/ISWCS.2011.6125307
[8]  
Gunnam K., 2007, TEXAS A M TECHNICAL
[9]  
Gunnam K. K., 2013, U.S. Patent, Patent No. [8 359 522, 8359522]
[10]  
Gunnam K. K., 2006, TEXAS A M UNIVERSITY