A design of source-degenerated CMOS active negative group delay circuit using bonding wire

被引:2
|
作者
Chaudhary, Girdhari [1 ]
Jeong, Junhyung [1 ]
Wang, Qi [1 ]
Jeong, Yongchae [1 ]
机构
[1] Chonbuk Natl Univ, Div Elect & Infonnat Engn, 567 Baekjae Dearo, Jeonju Si 54896, Jeollabuk Do, South Korea
来源
IEICE ELECTRONICS EXPRESS | 2019年 / 16卷 / 07期
基金
新加坡国家研究基金会;
关键词
CMOS integrated circuits; negative group delay (NGD); wire bonding; BROAD-BAND;
D O I
10.1587/elex.16.20190010
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a design of CMOS source-degenerated active negative group delay (NGD) circuit by using bonding wire for a compact circuit size. The proposed circuit consists of two cascaded MOSFETs where parallel RLC resonator circuits are connected to the source of the MOSFETs. To reduce the size, the parallel RLC resonators are implemented with bonding wires and pads. For experimental verification, two-stage NGD circuits with slightly different center frequencies were designed. The measurement results show that the NGD bandwidth, group delay, and gain are 100 MHz, -2.5 ns, and 3 dB, respectively. The measured input/output return losses are higher than 8 dB and 14 dB, respectively, at the center frequency of 1.88 GHz.
引用
收藏
页码:1 / 5
页数:5
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