Top-down methodology in industrial mixed-signals design

被引:0
作者
Liao, E [1 ]
Postula, A [1 ]
Ding, Y [1 ]
机构
[1] Univ Queensland, ITEE, St Lucia, Qld, Australia
来源
MICROELECTRONICS: DESIGN, TECHNOLOGY, AND PACKAGING II | 2006年 / 6035卷
关键词
design automation; design methodology; hardware design languages; integrated circuit layout; mixed analogue -digital integrated circuits; simulation; testing;
D O I
10.1117/12.637866
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Analogue and mixed-signal designs are fast becoming significant in System-On-Chip (SoC) designs as digital computational cores need to interface with the real world. Cellular phones, magnetic disk drives, speech recognition hardware and other 'digital' innovations in fact rely on a core of analogue circuitry. Mature digital CAD tools competently handle the digital portions of SoC designs. This is not true for analogue and mixed-signals components, still designed manually using time-consuming techniques. A good top-down design methodology can drastically reduce the design time of analogue components in SoCs and allow comprehensive functionality verification. This paper contains a critical survey of current design processes and tools, a top-down design case study and introduces MIX-SYN, a new platform for fast-tracking exploration and design time for the analogue and mixed-signals design industry.
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页数:9
相关论文
共 11 条
[1]  
ANTAO BAA, 1992, DESIGN TEST COMPUTER, V9, P8
[2]   IDAC - AN INTERACTIVE DESIGN TOOL FOR ANALOG CMOS CIRCUITS [J].
DEGRAUWE, MGR ;
NYS, O ;
DIJKSTRA, E ;
RIJMENANTS, J ;
BITZ, S ;
GOFFART, BLA ;
VITTOZ, EA ;
CSERVENY, S ;
MEIXENBERGER, C ;
VANDERSTAPPEN, G ;
OGUEY, HJ .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1987, 22 (06) :1106-1116
[3]   BLADES - AN ARTIFICIAL-INTELLIGENCE APPROACH TO ANALOG CIRCUIT-DESIGN [J].
ELTURKY, F ;
PERRY, EE .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1989, 8 (06) :680-692
[4]   ANALOG CIRCUIT-DESIGN OPTIMIZATION BASED ON SYMBOLIC SIMULATION AND SIMULATED ANNEALING [J].
GIELEN, GGE ;
WALSCHARTS, HCC ;
SANSEN, WMC .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1990, 25 (03) :707-713
[5]   OPASYN - A COMPILER FOR CMOS OPERATIONAL-AMPLIFIERS [J].
HAN, YK ;
SEQUIN, CH ;
GRAY, PR .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1990, 9 (02) :113-125
[6]  
HARJANI R, 1987, P 24 ACM IEEE C DES, P42
[7]  
MEDEIRO F, 1994, COMP AID DES 1994 IE
[8]  
Mounir A, 2003, DESIGNERS FORUM: DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, P280
[9]   Synthesis of high-performance analog circuits in ASTRX/OBLX [J].
Ochotta, ES ;
Rutenbar, RA ;
Carley, LR .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1996, 15 (03) :273-294
[10]   Anaconda: Simulation-based synthesis of analog circuits via stochastic pattern search [J].
Phelps, R ;
Krasnicki, M ;
Rutenbar, RA ;
Carley, LR ;
Hellums, JR .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2000, 19 (06) :703-717