共 10 条
[1]
Alvandpour A, 2000, ISCAS 2000: IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - PROCEEDINGS, VOL V, P465
[2]
[Anonymous], 1992, CIRCUIT DESIGN CMOS
[3]
Bisdounis L, 1996, 1996 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN - DIGEST OF TECHNICAL PAPERS, P189, DOI 10.1109/LPE.1996.547504
[4]
Clustered table-based macromodels for RTL power estimation
[J].
NINTH GREAT LAKES SYMPOSIUM ON VLSI, PROCEEDINGS,
1999,
:354-357
[5]
ECKERBERT D, 2001, P 2001 IEEE INT S CI
[7]
Effective capacitance macro-modelling for architectural-level power estimation
[J].
PROCEEDINGS OF THE 8TH GREAT LAKES SYMPOSIUM ON VLSI,
1998,
:414-419