Cryogenic Subthreshold Swing Saturation in FD-SOI MOSFETs Described With Band Broadening

In the standard MOSFET description of the drain current ID as a function of applied gate voltage V (GS), the subthreshold swing SS(T) = dV(GS)/d log I-D has a fundamental lower limit as a function of temperature T given by SS(T) = ln 10 k(B) T/e. However, recent low-temperature studies of different advanced CMOS technologies have reported SS(4 K or lower) values that are at least an order of magnitude larger. Here, we present and analyze the saturation of SS(T) in 28 nm fully-depleted silicon-on-insulator (FD-SOI) devices for both n- and p-type MOSFETs of different gate oxide thicknesses and gate lengths down to 4 K. Until now, the increase of interface-trap density close to the band edge as temperature decreases has been put forward to understand the saturation. Here, an original explanation of the phenomenon is presentedby considering a disorder-induced tail in the density of states at the conduction (valence) band edge for the calculation of the MOS channel transport by applying the Fermi-Dirac statistics. This results in a subthreshold I-D similar to (e)eV (GS)/k(B) T-0 for T-0 = 35 K with saturation value SS(T < T-0) = ln 10 k(B) T-0/e. The proposed model adequately describes the experimental data of SS(T) from 300 down to 4 K using k BT0 similar or equal to 3 meV for the width of the exponential tail and can also accurately describe SS(I-D) within the whole subthreshold region. Our analysis allows a direct determination of the technology-dependent band-tail extension forming a crucial element in future compact modeling and the design of cryogenic circuits.