Mixed Analog-Digital Pulse-Width Modulator for Massive-MIMO Transmitters

被引:0
作者
Papananos, Yannis [1 ]
Alexiou, Nikolaos [1 ]
Galanopoulos, Konstantinos [1 ]
Seebacher, David [1 ]
Dielacher, Franz [1 ]
机构
[1] Infineon Technol Austria AG, Villach, Austria
来源
2016 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATION (VLSI-TSA) | 2016年
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中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a mixed-signal outphasing RF-PWM modulator with improved time resolution and high dynamic range realized in 40nm CMOS. Phase shifting is implemented using synchronously tapped analog delay lines comprising integrated L and C devices and achieving a fine-step delay of 2 ps while occupying acceptable silicon area and consuming zero power. The analog outputs of the delay lines are converted to CMOS-compatible square pulses that drive an AND gate which generates RF-PWM pulses with minimum pulse width of 10ps on a 50-Ohm load. According to system-integrated modulator co-simulation results, an ACLR of -45dBc is achieved from a 40 MHz baseband signal on a 2.65 GHz carrier.
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页数:2
相关论文
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[2]  
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[3]  
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Seebacher, David ;
Singerl, Peter ;
Schuberth, Christian ;
Dielacher, Franz ;
Papananos, Yannis ;
Alexiou, Nikolaos ;
Galanopoulos, Kostas ;
Gadringer, Michael E. ;
Boesch, Wolfgang .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2015, 62 (09) :2342-2350