VLSI implementation of a selective median filter

被引：25

作者：

Chen, CT

Chen, LG

Hsiao, JH

机构：

[1] Department of Electrical Engineering, National Taiwan University, Taipei

来源：

IEEE TRANSACTIONS ON CONSUMER ELECTRONICS | 1996年 / 42卷 / 01期

关键词：

D O I：

10.1109/30.485459

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, the VLSI implementation of a selective median filter for the real-time applications is presented. The proposed design is based on a novel bit-level running algorithm with a modular and parallel in structure. A chip designed by the cell-based style is demonstrated to show the hardware realization. The performance of the proposed design is also presented.

引用

收藏

页码：33 / 42

页数：10

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