Non-volatile hybrid memory devices with excellent reliability

被引:4
作者
Chung, Dae Sung [1 ]
Kang, Il [2 ]
Kwon, Soon-Ki [2 ]
Kim, Yun-Hi [3 ]
机构
[1] Chung Ang Univ, Sch Chem Engn & Mat Sci, Seoul 156756, South Korea
[2] Gyeongsang Natl Univ, Res Inst Green Energy Convergence Technol REGET, Sch Mat Sci & Engn, Jinju 660701, South Korea
[3] Gyeongsang Natl Univ, Dept Chem, Jinju 660701, South Korea
基金
新加坡国家研究基金会;
关键词
FIELD-EFFECT TRANSISTORS; HIGH-MOBILITY; HIGH-PERFORMANCE; POLYMER SEMICONDUCTORS; THRESHOLD VOLTAGE; STABILITY; NANOCRYSTALS; COPOLYMERS; TRANSPORT; ACENES;
D O I
10.1039/c3ra41511b
中图分类号
O6 [化学];
学科分类号
0703 ;
摘要
Electronic applications of organic-inorganic hybrids in which both components contribute to critical functionality have offered enhanced performance over their individual components. In this work, highly reliable non-volatile memory transistors were demonstrated using a polymeric semiconductor and a floating gate consisting of PbS nanocrystals (NCs). Poly[2,5-bis(2-octyldodecyl)pyrrolo[3,4-c]pyrrole-1,4(2H,5H)-dione-(E)-1,2-di(2,2'-bithiophen-5-yl)ethene](PDPPDBTE), used as a semiconductor layer, enabled superior reliability of electronic characteristics. The fabricated unit field effect transistors revealed excellent storage stability for more than several months, long time-operational stability and bias stress durability with little change of the threshold voltage (Delta Vth) (similar to 0.5 V) during a period of prolonged bias stress under ambient conditions. Based on the optimized transistor geometry, memory devices were constructed by embedding a layer of NCs between layers of SiO2 and Cytop (TM) as a floating gate. The resulting memory devices revealed non-volatile memory operation with a memory on-off ratio higher than 10(3) and a memory window of 20 V at 30 V of writing and erasing voltage. More importantly, it turned out that the entire trapping mechanisms of the memory device originate solely from NCs, due to the inert nature of PDPPDBTE and Cytop (TM). As a result, very reproducible memory operation under repeated write/erase cycles for 100 times as well as long retention time of the memory state, more than 10 days were observed in ambient conditions. Detailed analyses on the physical origin of such excellent device reliability were fully discussed.
引用
收藏
页码:13156 / 13162
页数:7
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