A/D Converter Trends: Power Dissipation, Scaling and Digitally Assisted Architectures

被引：168
作者：
Murmann, B. [1 ]
机构：
[1] Stanford Univ, Stanford, CA 94305 USA
来源：
PROCEEDINGS OF THE IEEE 2008 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2008年
关键词：
D O I：
10.1109/CICC.2008.4672032
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper summarizes recent trends in the area of low-power A/D conversion. Survey data collected over the past eleven years indicates that the power efficiency of ADCs has improved on average by a factor of two every two years. A closer inspection on the impact of technology scaling is presented to explain the observed trend in the context of shrinking supply voltages and increasing device speed. Finally, a discussion on minimalistic and digitally assisted design approaches is used to sketch a route toward further improvements in ADC power efficiency and performance.
引用
收藏
页码：105 / 112
页数：8
相关论文
共 45 条
  • [1] The path to the software-defined radio receiver
    Abidi, Asad A.
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2007, 42 (05) : 954 - 966
  • [2] Analog circuits in ultra-deep-submicron CMOS
    Annema, AJ
    Nauta, B
    van Langevelde, R
    Tuinhout, H
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2005, 40 (01) : 132 - 143
  • [3] [Anonymous], IEEE ISSCC
  • [4] [Anonymous], IEEE INT SOL STAT CI
  • [5] [Anonymous], 2007, 2007 IEEE INT SOL ST, DOI DOI 10.1109/ISSCC.2007.373387
  • [6] [Anonymous], 2008, 2008 IEEE INT SOLID, DOI DOI 10.1109/ISSCC.2008.4523146
  • [7] ANTHONY M, 2008, VLSI CIRC S JUN
  • [8] Design challenges of technology scaling
    Borkar, S
    [J]. IEEE MICRO, 1999, 19 (04) : 23 - 29
  • [9] BOULEMNAKHER M, 2008, IEEE ISSCC FEB, P250
  • [10] BULT Y, 2006, ANALOG CIRCUIT DESIG
12345