High-Performance Four-Stage CMOS OTA Suitable for Large Capacitive Loads

Designing four-stage operational transconductance amplifiers (OTAs) is often considered a challenging task mainly because of the required non trivial frequency compensation procedure. In this study, starting from the simplest architecture (a differential stage cascaded by three common source stages) a high-performance OTA is demonstrated, outperforming all the (few) previous implementations. Thanks to the frequency compensation scheme and to the adoption of a slew-rate enhancer section, the solution is able to drive large capacitive loads as high as 1 nF, rivaling in terms of bandwidth and speed even with three-stage counterparts, traditionally credited to be better because of the less number of high-impedance nodes. The solution, fabricated in a 0.35-mu m technology, occupies 0.014-mm(2) with DC consumption of 170 mu W. It also achieves nearly 3-MHz gain bandwidth product while driving the 1-nF load with less than 0.5-mu s1% settling time.