Electrical characteristics of field effect transistors (FETs) grown on Fe-doped InP substrates are extremely dependent on the presence of a buffer with suitable resistivity below the active channel. The growth of a semi-insulating (SI) buffer layer on the InP substrate is required to compensate the n-type impurities (silicon) accumulation on the epi-ready substrate surface, responsible for parallel conduction at the substrate/buffer interface. Known techniques to prevent parasitic conduction in MOVPE growth [1,2] could not be reproduced successfully in our reactor or were not compatible with the use of patterned substrates for OEIC processing [3,4]. In this report, we describe new growth methods of semi-insulating buffers, using low pressure metalorganic vapor phase epitaxy. In both cases, specific growth procedures described below have allowed complete compensation of the electrical activity of n-type impurities at the interface.