New 8-Level Basic Structure for Cascaded Multilevel Inverters with Reduced Number of Switches and DC Voltage Sources

被引：11

作者：

Babaei, Ebrahim ^{[1
,2
]}

Buccella, Concettina ^{[3
]}

Cecati, Carlo ^{[3
]}

机构：

[1] Univ Tabriz, Fac Elect & Comp Engn, Tabriz, Iran

[2] Near East Univ, Engn Fac, Mersin 10, TR-99138 Nicosia, North Cyprus, Turkey

[3] Univ Aquila, Dept Informat Engn Comp Sci & Math, Laquila, Italy

来源：

JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS | 2019年 / 28卷 / 03期

关键词：

Multilevel inverters; cascaded multilevel inverter; symmetric multilevel inverter; asymmetric multilevel inverter; CONVERTERS; TOPOLOGY; REDUCTION;

D O I：

10.1142/S0218126619500385

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Multilevel inverters are generally used in medium-voltage and high-power applications. In this paper, a new 8-level basic structure for cascaded multilevel inverters is proposed. Based on proposed basic structure, two different cascaded multilevel topologies are proposed. The proposed cascaded multilevel inverters use less number of power switches, IGBTs and de voltage sources compared with the conventional multilevel inverters. In order to generate all steps at the output voltage, three different algorithms to determine the amplitudes of de voltage sources are presented. To reconfirm the performance and correct operation of the proposed topologies, the experimental results for a 15-level inverter are presented.

引用

页数：16

共 43 条

[1] 16-Level Basic Topology for Cascaded Multilevel Inverters with Reduced Number of Components
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PROCEEDINGS OF THE IECON 2016 - 42ND ANNUAL CONFERENCE OF THE IEEE INDUSTRIAL ELECTRONICS SOCIETY, 2016, : 3105 - 3110
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