Implementations of H.264/AVC baseline decoder on different digital signal processors

被引:0
作者
Moshe, Y [1 ]
Peleg, N [1 ]
机构
[1] Technion Israel Inst Technol, Dept Elect Engn, Signal & Image Proc Lab, IL-32000 Haifa, Israel
来源
PROCEEDINGS ELMAR-2005 | 2005年
关键词
H.264; MPEG-4; AVC; video coding; digital signal processor implementation;
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
H.264/AVC is the newest video coding standard developed by the joint effort of ITU-T VCEG and ISO/IEC MPEG. This standard achieves a significant improvement in coding efficiency relative to former standards at the cost of increased complexity, thus gaining a lot of attention by industry, but creating a big challenge for efficient hardware and software implementations. In this paper three implementations of an H.264/AVC baseline decoder using different leading high-end Digitals Signal Processors are described. The implementation has been done, using the JVT reference software, by undergraduate seniors under the supervision of the authors, in the course of one year. This study is beneficial in several aspects. First, the complexity of an H.264/AVC decoder is measured and analyzed using "real world" hardware and software. Second, the difficulties that programmers could face when implementing an H.264/AVC decoder scheme are examined. And lastly, different Digital Signal Processors are examined under a very demanding algorithm.
引用
收藏
页码:37 / 40
页数:4
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