A transient-improved low-dropout regulator with nested flipped voltage follower structure

被引:16
作者
Chen, Hua [1 ]
Leung, Ka Nang [1 ]
机构
[1] Chinese Univ Hong Kong, Dept Elect Engn, Shatin, Hong Kong, Peoples R China
关键词
flipped voltage follower; low-dropout regulator; power management IC; LOW-QUIESCENT CURRENT; LDO;
D O I
10.1002/cta.1812
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this article, the existing low-dropout regulator (LDO) based on cascoded flipped voltage follower (CAFVF) is reviewed. A new method to simulate the open-loop gain of an LDO with a CAFVF structure is conveyed. The drawback of CAFVF-based LDO is that the nondominant pole locates at low-frequency and pole-zero cancellation using a large equivalent series resistance of loading capacitor is required for stability. To tackle this problem, a novel LDO structure based on a nested CAFVF is proposed and analyzed in this article. It is shown that the nondominant pole is pushed to a high frequency and the LDO stability is improved. The proposed circuit is fabricated using a commercial 0.35-mu m CMOS technology, and the load-transient response between 0.5 and 60mA settles at approximately 5 mu s. Copyright (c) 2012 John Wiley & Sons, Ltd.
引用
收藏
页码:1016 / 1026
页数:11
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