New generation of Z-RAM

被引:115
作者
Okhonin, S. [1 ]
Nagoga, M. [1 ]
Carman, E. [1 ]
Beffa, R. [1 ]
Faraoni, E. [1 ]
机构
[1] PSE B, Innovat Silicon, Lausanne, Switzerland
来源
2007 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, VOLS 1 AND 2 | 2007年
关键词
D O I
10.1109/IEDM.2007.4419103
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
A new generation of the single transistor floating body DRAM is introduced for the first time. The new memory is largely based on the bipolar transistor existing in the MOS structure. The memory's main features are high margin, low-power consumption, and scalability.
引用
收藏
页码:925 / 928
页数:4
相关论文
共 3 条
  • [1] COLINGE JP, 1991, SILICON INSULATOR
  • [2] Memory design using a one-transistor gain cell on SOI
    Ohsawa, T
    Fujita, K
    Higashi, T
    Iwata, Y
    Kajiyama, T
    Asao, Y
    Sunouchi, K
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2002, 37 (11) : 1510 - 1522
  • [3] Okhonin S., 2001, IEEE INT SOI C, P153