共 18 条
[1]
Agoyan M, 2010, LECT NOTES COMPUT SC, V6035, P182, DOI 10.1007/978-3-642-12510-2_13
[2]
Balasch J, 2011, 2011 WORKSH FAULT DI, P105, DOI DOI 10.1109/FDTC.2011.9
[4]
Endo S., 2011, ON CHIP GLITCHY CLOC, P265
[5]
Flynn C. O., 2015, CHIPWHISPERER
[6]
Fukunaga T, 2009, PROCEEDINGS OF THE 2009 WORKSHOP ON FAULT DIAGNOSIS AND TOLERANCE IN CRYPTOGRAPHY (FDTC 2009), P84, DOI 10.1109/FDTC.2009.34
[7]
Katashita T., 2011, NIAT 2011, P36
[8]
Kazemi Z., 2018, 3 INT VER SEC WORK
[9]
On the Effects of Clock and Power Supply Tampering on Two Microcontroller Platforms
[J].
2014 WORKSHOP ON FAULT DIAGNOSIS AND TOLERANCE IN CRYPTOGRAPHY (FDTC 2014),
2014,
:8-17
[10]
Korczyc J., 2012, EVALUATION SUSCEPTIB, P2