Vertical 3D NAND Flash Memory Technology

被引：37

作者：

Nitayama, Akihiro ^{[1
]}

Aochi, Hideaki ^{[1
]}

机构：

[1] Toshiba Co Ltd, Ctr Semicond Res & Dev, Isogo Ku, Yokohama, Kanagawa 2358522, Japan

来源：

ULSI PROCESS INTEGRATION 7 | 2011年 / 41卷 / 07期

关键词：

ULTRA-HIGH DENSITY;

D O I：

10.1149/1.3633282

中图分类号：

O646 [电化学、电解、磁化学];

学科分类号：

081704 ;

摘要：

We've developed Bit Cost Scalable (BiCS) flash technology as a three-dimensional memory for the future ultra high density storage devices, which extremely reduces the chip costs by vertically stacking memory arrays with punch and plug process. We've advanced it into Pipe-shaped BiCS flash memory introducing U-shaped NAND string structure, to improve operation window, speed and reliability. 32 G bit test chips with 16 stacked layers by 60nm P-BiCS flash process have been fabricated, and the functionality of Multi-Level-Cell (MLC) operation has been successfully demonstrated. P-BiCS is the most promising candidate of three-dimensional ultra high density data storage memories.

引用

页码：15 / 25

页数：11

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