Experimental Investigation of Border Trap Generation in InGaAs nMOSFETs With Al2O3 Gate Dielectric Under PBTI Stress

被引:19
作者
Jiao, Guangfan [1 ]
Yao, Chengjun [1 ]
Xuan, Yi [2 ,3 ]
Huang, Daming [1 ]
Ye, Peide D. [2 ,3 ]
Li, Ming-Fu [1 ]
机构
[1] Fudan Univ, Dept Microelect, State Key Lab ASIC & Syst, Shanghai 201203, Peoples R China
[2] Purdue Univ, Sch Elect & Comp Engn, W Lafayette, IN 47907 USA
[3] Purdue Univ, Birck Nanotechnol Ctr, W Lafayette, IN 47907 USA
基金
美国国家科学基金会; 中国国家自然科学基金;
关键词
Border traps; InGaAs n-type metal-oxide-semiconductor field-effect transistors (nMOSFETs); OFF-current; positive-bias temperature instability (PBTI); INTERFACE;
D O I
10.1109/TED.2012.2190417
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The reliability performance of InxGa1-xAs n-type metal-oxide-semiconductor field-effect transistors with Al2O3 gate dielectric under positive-bias temperature instability stress is investigated systematically. A model of stress-induced border traps was proposed to interpret all charge pumping and I-V experimental results excellently. The stress-induced border traps include recoverable donor traps and permanent acceptor traps with respective energy densities Delta D-SOX(Donor) (E) and Delta D-SOX(Acceptor) (E). The shapes of Delta D-SOX(Donor) (E) and Delta D-SOX(Acceptor) (E) have been extracted from experimental data Delta D-SOX(Acceptor) (E) mainly distributes in the conduction band of InGaAs with a tail extending to the mid-gap, whereas Delta D-SOX(Donor) (E) has a large distribution inside the energy gap and extends to the conduction band. The high density of Delta D-SOX(Donor) (E) in the energy gap induces large degradation in the OFF-current, which is particularly serious when the In composition x is raised to 0.65.
引用
收藏
页码:1661 / 1667
页数:7
相关论文
共 18 条
[1]  
[Anonymous], 2008, IEEE INT ELECT DEVIC
[2]  
[Anonymous], APPL PHYS LETT
[3]  
[Anonymous], IEEE INT EL DEV M IE
[4]   A comprehensive framework for predictive modeling of negative bias temperature instability [J].
Chakravarthi, S ;
Krishnan, AT ;
Reddy, V ;
Machala, CF ;
Krishnan, S .
2004 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM PROCEEDINGS, 2004, :273-282
[5]   Nanometre-scale electronics with III-V compound semiconductors [J].
del Alamo, Jesus A. .
NATURE, 2011, 479 (7373) :317-323
[6]   A Rigorous Study of Measurement Techniques for Negative Bias Temperature Instability [J].
Grasser, Tibor ;
Wagner, Paul-Juergen ;
Hehenberger, Philipp ;
Goes, Wolfgang ;
Kaczer, Ben .
IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 2008, 8 (03) :526-535
[7]   A RELIABLE APPROACH TO CHARGE-PUMPING MEASUREMENTS IN MOS-TRANSISTORS [J].
GROESENEKEN, G ;
MAES, HE ;
BELTRAN, N ;
DEKEERSMAECKER, RF .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1984, 31 (01) :42-53
[8]   Why Would Furniture Be Relevant for Collaborative Learning? Introduction [J].
Huang, J. ;
Cherubini, M. ;
Nova, N. ;
Dillenbourg, P. .
INTERACTIVE ARTIFACTS AND FURNITURE SUPPORTING COLLABORATIVE WORK AND LEARNING, 2009, 10 :1-13
[9]  
Jiao G., 2011, IEDM
[10]   On-the-fly interface trap measurement and its impact on the understanding of NBTI mechanism for p-MOSFETs with SiON gate dielectric [J].
Liu, W. J. ;
Liu, Z. Y. ;
Huang, Daming ;
Liao, C. C. ;
Zhang, L. F. ;
Gan, Z. H. ;
Wong, Waisum ;
Shen, C. ;
Li, Ming-Fu .
2007 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, VOLS 1 AND 2, 2007, :813-+