A new scheme of multilevel inverter with charge balancing control and minimum number of switches

被引:0
作者
Barzegarkhoo, Reza [1 ]
Karami, Bagher [2 ]
Abrishamifar, Adib [2 ]
Kojabadi, Hossein Madadi [1 ]
机构
[1] Sahand Univ Technol, Fac Elect Engn, Tabriz, Iran
[2] Iran Univ Sci & Technol, Fac Elect Engn, Tehran, Iran
来源
2014 22nd Iranian Conference on Electrical Engineering (ICEE) | 2014年
关键词
charge balancing control; multilevel inverter; PWM; selective harmonic elimination; switching devices; TOPOLOGIES; CONVERTER; PWM;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A new scheme of symmetric multilevel inverter is proposed that could reduce the switch numbers, conduction losses, and costs. A novel switching algorithm based on selective harmonic elimination PWM scheme has been introduced to control the voltage balancing of the dc link capacitors. In this way, all of the voltage levels can be created in the inverter output with only one dc power supply. The visibility and effectiveness of the proposed strategy has been verified through various simulation results.
引用
收藏
页码:700 / 705
页数:6
相关论文
共 50 条
  • [21] A Battery Cell Balancing Control Scheme with Minimum Charge Transfer
    Shen, Zhiyuan
    Gui, Handong
    Tolbert, Leon M.
    2016 IEEE ENERGY CONVERSION CONGRESS AND EXPOSITION (ECCE), 2016,
  • [22] Modified cascaded multilevel inverter for renewable energy systems with less number of unidirectional switches
    Thakre, Kishor
    Mohanty, Kanungo Barada
    Kommukuri, Vinaya Sagar
    Chatterjee, Aditi
    Nigam, Prateek
    Gupta, Sanjeev Kumar
    ENERGY REPORTS, 2022, 8 : 5296 - 5304
  • [23] Asymmetric Multilevel Hybrid Inverter with Reduced Number of Switches
    Abraham, Babitha T.
    Benny, Anish
    2014 ANNUAL INTERNATIONAL CONFERENCE ON EMERGING RESEARCH AREAS: MAGNETICS, MACHINES AND DRIVES (AICERA/ICMMD), 2014,
  • [24] A Novel Topology for Multilevel Inverter with Reduced Number of Switches
    Karaca, Hulusi
    WORLD CONGRESS ON ENGINEERING AND COMPUTER SCIENCE, WCECS 2013, VOL I, 2013, I : 350 - 354
  • [25] A higher levels multilevel inverter with reduced number of switches
    Harbi, I. A.
    Azazi, Haitham Z.
    Lashine, Azza E.
    Elsabbe, Awad E.
    INTERNATIONAL JOURNAL OF ELECTRONICS, 2018, 105 (08) : 1286 - 1299
  • [26] Asymmetrical Multilevel Inverter Topology with Reduced Number of Switches
    Ahmed, Rokan Ali
    Mekhilef, Saad
    Ping, Hew Wooi
    INTERNATIONAL REVIEW OF ELECTRICAL ENGINEERING-IREE, 2012, 7 (04): : 4761 - 4767
  • [27] Crossover Switches Cell (CSC): A New Multilevel Inverter Topology with Maximum Voltage Levels and Minimum DC Sources
    Vahedi, Hani
    Al-Haddad, Kamal
    Ounejjar, Youssef
    Addoweesh, Khaled
    39TH ANNUAL CONFERENCE OF THE IEEE INDUSTRIAL ELECTRONICS SOCIETY (IECON 2013), 2013, : 54 - 59
  • [28] GA Based Selective Harmonic Elimination for Multilevel Inverter with Reduced Number of Switches
    Karaca, Hulusi
    Bektas, Enes
    WORLD CONGRESS ON ENGINEERING AND COMPUTER SCIENCE, WCECS 2015, VOL I, 2015, : 204 - 209
  • [29] Simulation of New Symmetric and. Asymmetric Multilevel Inverter Topology with Reduced Number of Switches
    Thiyagarajan, V.
    Somasundaram, P.
    2018 4TH INTERNATIONAL CONFERENCE ON ELECTRICAL ENERGY SYSTEMS (ICEES), 2018, : 315 - 319
  • [30] Modular three phase asymmetrical cascaded multilevel inverter with lower number of switches
    Thakre, Kishor
    Soni, Shashikant
    Kommukuri, Vinayasagar
    Chaterjee, Aditi
    INTERNATIONAL JOURNAL OF MODELLING AND SIMULATION, 2025, 45 (01) : 237 - 244