Effect of the switching order on power dissipation in switched-capacitor circuits

被引:1
作者
Casinovi, G [1 ]
机构
[1] Georgia Inst Technol, Sch Elect & Comp Engn, Atlanta, GA 30332 USA
关键词
circuit simulation; computer-aided analysis; power modeling and estimation; switched-capacitor circuits;
D O I
10.1109/43.969432
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The total power dissipation in a switched-capacitor circuit can be expressed as the sum of two terms: the static power absorbed by the operational amplifiers and the switching power, i.e., the power dissipated in charging and discharging the capacitors. It is shown that, in general, the switching power depends on the order in which the switches connected to the same clock phase are closed. In practice, it is impossible to know this order with absolute certainty. As a consequence, a realistic estimate of the power dissipation can only be given as a range of possible values. It is shown that upper and lower bounds on the power dissipation can be computed by solving a single-source shortest paths problem on a directed graph. Numerical results obtained on a number of switched-capacitor circuits indicate that, if low-power operational amplifiers are used, the switching power can be a significant fraction of the circuit's overall power dissipation.
引用
收藏
页码:1389 / 1397
页数:9
相关论文
共 9 条
[1]  
Aho A., 1987, DATA STRUCTURES ALGO
[2]   A 1-V 1.8-MHz CMOS switched-opamp SC filter with rail-to-rail output swing [J].
Baschirotto, A ;
Castello, R .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1997, 32 (12) :1979-1986
[3]  
BAZARJANI SS, 1995, P IEEE S LOW POW EL, P70
[4]   A 1-V CMOS switched-opamp switched-capacitor pseudo-2-path filter [J].
Cheung, VSL ;
Luong, HC ;
Ki, WH .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2001, 36 (01) :14-22
[5]   PRACTICAL IMPLEMENTATION OF A GENERAL COMPUTER-AIDED-DESIGN TECHNIQUE FOR SWITCHED CAPACITOR CIRCUITS [J].
DEMAN, HJ ;
RABAEY, J ;
ARNOUT, G ;
VANDEWALLE, J .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1980, 15 (02) :190-200
[6]   ALGORITHMIC ASPECTS OF ONE-DIMENSIONAL LAYOUT COMPACTION [J].
DOENHARDT, J ;
LENGAUER, T .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1987, 6 (05) :863-878
[7]   A 900-mV low-power ΔΣ A/D converter with 77-dB dynamic range [J].
Peluso, V ;
Vancorenland, P ;
Marques, AM ;
Steyaert, MSJ ;
Sansen, W .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1998, 33 (12) :1887-1897
[8]   ANALYSIS OF SWITCHED CAPACITIVE NETWORKS [J].
TSIVIDIS, YP .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1979, 26 (11) :935-947
[9]  
Vlach J., 1983, Computer Methods for Circuit Analysis and Design