Stress-induced leakage current and lateral nonuniform charge generation in thermal oxides subjected to negative-gate-voltage impulse stressing

High-field stressing of gate oxides can lead to an increase in the stress-induced leakage current (SILC), which could impose a potential scaling limitation for tunnel oxide applications in nonvolatile semiconductor memories. In this article, we report on positive lateral nonuniform (LNU) charge generation and hole trapping in silicon dioxide subjected to negative-gate-voltage, high-field impulse stressing, and the correlation of the LNU charge to the SILC. The LNU charge and SILC can be electrically annealed through repealed measurements of the gate current density vs gate voltage characteristics, or using either a constant voltage or constant current stress step. Electrical annealing studies show that the positive LNU charge is located close to the oxide-silicon interface and is distributed with a certain minimum energy level. A critical fluence or gate voltage has to be applied before significant LNU charge annealing is observed.