Performance projection and thermal management of high performance VLSI designs

The impacts of chip self-heating induced temperature non-uniformity within the VLSI chip and its influence on the performance on the designs are described in this paper. To accurately model the chip performance, both the electrical and the thermal analysis including chip packaging should be examined together. This paper describes a methodology that allows more accurate temperature calculation of the chip based on the circuit power analysis together with the thermal analysis that studies the on chip temperature distribution in order to improve the accuracy of existing method to account for on chip temperature gradients and perform a overall performance prediction and adjustment. A computational fluid dynamics analysis is used in this study to address non-uniform power distribution temperature calculation for high power integrated circuits. Example will be given and results will be discussed with highlighted conclusions.