Voltage-in-Current Latency Insertion Method for Diodes and MOSFETs

被引:8
|
作者
Chin, Wei Chun [1 ]
Pashkovich, Andrei [2 ]
Malinauskas, Kostas [3 ]
Schutt-Aine, Jose E. [4 ]
Ibrahim, Haidi [1 ]
Ahmad, Nur Syazreen [1 ]
Goh, Patrick [1 ]
机构
[1] Univ Sains Malaysia, Sch Elect & Elect Engn, Nibong Tebal 14300, Malaysia
[2] Silvaco Inc, Santa Clara, CA 95054 USA
[3] Silvaco Inc, Moscow 125047, Russia
[4] Univ Illinois, Dept Elect & Comp Engn, Urbana, IL 61801 USA
来源
IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY | 2020年 / 10卷 / 10期
关键词
Integrated circuit modeling; Mathematical model; Topology; Packaging; Circuit stability; Numerical stability; Stability analysis; Circuit analysis; latency insertion method (LIM); nonlinear; METHOD LIM; TRANSIENT SIMULATION;
D O I
10.1109/TCPMT.2020.3021413
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
This article presents the improved formulations for the latency insertion method (LIM) for diodes and MOSFETs utilizing the voltage-in-current framework. LIM is a fast circuit simulation algorithm, which computes the solutions to the voltages and currents in a circuit in a leapfrog manner, instead of a simultaneous matrix solution typically performed in the modified nodal analysis formalism. This allows LIM to have a far superior scaling with respect to the dimensions of the circuit. The formulations presented here have the advantage of not being limited by the stability condition in LIM and thus allow the simulations to be performed at larger time steps. Numerical examples are presented, which illustrate the improved performances of the developed formulations.
引用
收藏
页码:1708 / 1720
页数:13
相关论文
共 50 条
  • [1] Voltage-in-current formulation for the latency insertion method for improved stability
    Tan, K. H.
    Goh, P.
    Ain, M. F.
    ELECTRONICS LETTERS, 2016, 52 (23) : 1904 - U12
  • [2] Thin-Film Transistor Simulations With the Voltage-In-Current Latency Insertion Method
    Chin, Wei Chun
    Pashkovich, Andrei
    Schutt-Aine, Jose E.
    Ahmad, Nur Syazreen
    Goh, Patrick
    IEEE ACCESS, 2021, 9 : 159334 - 159348
  • [3] Modeling and Simulation for Transient Thermal Analyses Using a Voltage-in-Current Latency Insertion Method
    Wei Chun Chin
    Boon Chun New
    Nur Syazreen Ahmad
    Patrick Goh
    Journal of Electronic Science and Technology, 2022, (04) : 383 - 395
  • [4] Modeling and Simulation for Transient Thermal Analyses Using a Voltage-in-Current Latency Insertion Method
    Wei Chun Chin
    Boon Chun New
    Nur Syazreen Ahmad
    Patrick Goh
    Journal of Electronic Science and Technology, 2022, 20 (04) : 383 - 395
  • [5] Modeling and Simulation for Transient Thermal Analyses Using a Voltage-in-Current Latency Insertion Method
    Chin W.C.
    New B.C.
    Ahmad N.S.
    Goh P.
    Journal of Electronic Science and Technology, 2022, 20 (04) : 383 - 395
  • [6] Simulation of current crowding in inverse diodes of low-voltage Si MOSFETs at power cycling
    Schwabe, Christian
    Seidel, Peter
    Lutz, Josef
    2019 21ST EUROPEAN CONFERENCE ON POWER ELECTRONICS AND APPLICATIONS (EPE '19 ECCE EUROPE), 2019,
  • [7] High-Voltage SiC Devices: Diodes and MOSFETs
    Millan, J.
    Friedrichs, P.
    Mihaila, A.
    Soler, V.
    Rebollo, J.
    Banu, V.
    Godignon, P.
    2015 INTERNATIONAL SEMICONDUCTOR CONFERENCE (CAS), 2015, : 11 - 18
  • [8] CURRENT, VOLTAGE RATINGS CLIMB FOR POWER MOSFETS
    MATTERA, L
    ELECTRONIC DESIGN, 1978, 26 (25) : 28 - 29
  • [9] Improved latency insertion method for simulation of large networks with low latency
    Gao, R
    Schutt-Ainé, JE
    ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING, 2002, : 37 - 40
  • [10] Stability analysis of latency insertion method (LIM)
    Deng, ZC
    Schutt-Aine, JE
    ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING, 2004, : 167 - 170