Liveness and boundedness preservations of sharing synthesis of Petri net based representation for embedded systems

被引:2
作者
Xia, Chuanliang [1 ]
Shen, Bin [1 ]
Zhang, Hailin [1 ]
Wang, Yigui [1 ]
机构
[1] Shandong Jianzhu Univ, Sch Comp Sci & Technol, Jinan 250101, Shandong, Peoples R China
来源
COMPUTER SYSTEMS SCIENCE AND ENGINEERING | 2018年 / 33卷 / 05期
基金
中国国家自然科学基金;
关键词
Petri nets; synthesis; liveness; property preservation; modeling; FORMAL VERIFICATION; MODELS;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Petri net based Representation for Embedded Systems (PRES+) is an outstanding methodology for analysis, modeling and verification of embedded systems. State space explosion is an awful problem for PRES+ to model and analyze large complex embedded systems. In order to solve this problem, we concern with a method for expending PRES+ model by using synthesis approach. A kind of sharing synthesis operation for PRES+ is proposed in this paper. Under some conditions liveness and boundedness will be preserved by using this sharing synthesis approach. An applicable example in the form of an embedded control system illustrates the useful of our synthesis method. These results can be nicely used to investigate dynamic properties of large embedded systems.
引用
收藏
页码:345 / 350
页数:6
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