A Novel Low-Power and High-Speed Dual-Modulus Prescaler Based on Extended True Single-Phase Clock Logic

被引：0

作者：

Jia, Song ^{[1
]}

Wang, Ziyi ^{[1
]}

Li, Zijin ^{[1
]}

Wang, Yuan ^{[1
]}

机构：

[1] Peking Univ, Inst Microelect, Key Lab Microelect Devices & Circuits, Beijing 100871, Peoples R China

来源：

2016 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | 2016年

关键词：

E-TSPC; prescaler; critical path; short-circuit power;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A novel low-power and high-speed dual-modulus prescaler based on extended true single-phase clock (E-TSPC) scheme is presented. By restricting the short-circuit current in noncritical branchs, the design reduces the major source of power dissipation in E-TSPC scheme. The presented design enhances the maximum working frequency with shorter critical path and lower load capacitances. Simulation results in SMIC 40nm process show that compared with referenced E-TSPC based designs at least 61.2% (divide-by-2) and 41.1% (divide-by-3) reduction in power delay product (PDP) can be achieved by the proposed design.

引用

页码：2751 / 2754

页数：4