Neurocube: A Programmable Digital Neuromorphic Architecture with High-Density 3D Memory

被引:272
作者
Kim, Duckhwan [1 ]
Kung, Jaeha [1 ]
Chai, Sek [2 ]
Yalamanchili, Sudhakar [1 ]
Mukhopadhyay, Saibal [1 ]
机构
[1] Georgia Inst Technol, Sch Elect & Comp Engn, Atlanta, GA 30332 USA
[2] SRI Int, Princeton, NJ USA
来源
2016 ACM/IEEE 43RD ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE (ISCA) | 2016年
关键词
Neural nets; Neurocomputers; Neuromorphic computing;
D O I
10.1109/ISCA.2016.41
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a programmable and scalable digital neuromorphic architecture based on 3D high-density memory integrated with logic tier for efficient neural computing. The proposed architecture consists of clusters of processing engines, connected by 2D mesh network as a processing tier, which is integrated in 3D with multiple tiers of DRAM. The PE clusters access multiple memory channels ( vaults) in parallel. The operating principle, referred to as the memory centric computing, embeds specialized state-machines within the vault controllers of HMC to drive data into the PE clusters. The paper presents the basic architecture of the Neurocube and an analysis of the logic tier synthesized in 28nm and 15nm process technologies. The performance of the Neurocube is evaluated and illustrated through the mapping of a Convolutional Neural Network and estimating the subsequent power and performance for both training and inference.
引用
收藏
页码:380 / 392
页数:13
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