Low-power and high-speed 4-2 compressor

被引：0

作者：

Najafi, Ardalan ^{[1
]}

Mazloom-nezhad, Babak ^{[1
]}

Najafi, Amir ^{[2
]}

机构：

[1] Shahid Beheshti Univ, Dept Elect & Comp Engn, Tehran, Iran

[2] Islamic Azad Univ, Dept Elect Engn, Qazvin Branch, Qazvin, Iran

来源：

2013 36TH INTERNATIONAL CONVENTION ON INFORMATION AND COMMUNICATION TECHNOLOGY, ELECTRONICS AND MICROELECTRONICS (MIPRO) | 2013年

关键词：

4-2; Compressor; High performance arithmetic circuits; Multiplier; Low-power design; DESIGN;

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

Compressors are the most important component of multipliers. Multipliers themselves are important components that dictate the overall performance of arithmetic circuits. In this paper, a new 4-2 compressor architecture is proposed. This architecture uses Carry Generator Module (CGEN) which has been used for 5-2 and 7-2 compressors already. The proposed architecture is compared with the best architecture presented in the literature in terms of power and delay. Interestingly, analysis shows that the proposed compressor architecture outperforms the best existing architecture both in terms of power and delay. Architectures are simulated in 180nm and 130nm technologies. In both 180nm and 130nm technologies the proposed architecture reduces power-delay product (PDP) parameter by 17.01% and 39.04%, respectively.

引用

页码：66 / 69

页数：4

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