Implementing and testing the FPGA prototype of a DCM demodulator using the Matlab/Simulink environment

MultiBand OFDM (MB-OFDM) UWB [1] is a short-range promising wireless technology for high data rate communications. We have implemented the baseband processing of the MB-OFDM system, using Matlab and Simulink. We are now developing hardware blocks to implement the receiver. This paper presents the hardware implementation of the Dual Carrier Modulation (DCM) demodulator and its integration in the complete receiver. Xilinx System Generator was employed to generate the VHDL code of the demodulator. Other blocks are either developed directly with VHDL code or are yet at a behavioural level, described by Matlab or Simulink. Bit error rate values were obtained, using co-simulation based on the Xilinx simulator, for the hardware descriptions, and MatIab/Simulink for higher level descriptions(1).