A retargetable compilation methodology for embedded digital signal processors using a machine-dependent code optimization library

被引:0
作者
Sudarsanam, A [1 ]
Malik, S
Fujita, M
机构
[1] Princeton Univ, Dept Elect Engn, Princeton, NJ 08544 USA
[2] Fujitsu Labs Amer, Santa Clara, CA USA
关键词
digital signal processor; code generation; code optimization; retargetability;
D O I
10.1023/A:1008913323623
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
We address the problem of code generation for embedded DSP systems. Such systems devote a limited quantity of silicon to program memory, so the embedded software must be sufficiently dense. Additionally, this software must be written so as to meet various high-performance constraints. Unfortunately, current compiler technology is unable to generate dense, high-performance code for DSPs, due to the fact that it does not provide adequate support for the specialized architectural features of DSPs via machine-dependent code optimizations. Thus, designers often program the embedded software in assembly, a very time-consuming task. In order to increase productivity, compilers must be developed that are capable of generating high-quality code for DSPs. The compilation process must also be made retargetable, so that a variety of DSPs may be efficiently evaluated for potential use in an embedded system. We present a retargetable compilation methodology that enables high-quality code to be generated for a wide range of DSPs. Previous work in retargetable DSP compilation has focused on complete automation, and this desire for automation has limited the number of machine-dependent optimizations that can be supported. In our efforts, we have given code quality higher priority over complete automation. We demonstrate how by using a library of machine-dependent optimization routines accessible via a programming interface, it is possible to support a wide range of machine-dependent optimizations, albeit at some cost to automation. Experimental results demonstrate the effectiveness of our methodology, which has been used to build good-quality compilers for three fixed-point DSPs.
引用
收藏
页码:187 / 206
页数:20
相关论文
共 27 条
[1]  
Aho Alfred V., 2007, COMPILERS PRINCIPLES
[2]   CODE GENERATION USING TREE MATCHING AND DYNAMIC-PROGRAMMING [J].
AHO, AV ;
GANAPATHI, M ;
TJIANG, SWK .
ACM TRANSACTIONS ON PROGRAMMING LANGUAGES AND SYSTEMS, 1989, 11 (04) :491-516
[3]  
Araujo G., 1995, Proceedings of the Eighth International Symposium on System Synthesis (IEEE Cat. No.95TH8050), P36, DOI 10.1109/ISSS.1995.520610
[4]   Instruction set design and optimizations for address computation in DSP architectures [J].
Araujo, G ;
Sudarsanam, A ;
Malik, S .
9TH INTERNATIONAL SYMPOSIUM ON SYSTEMS SYNTHESIS, PROCEEDINGS, 1996, :102-107
[5]   IMPROVEMENTS TO GRAPH-COLORING REGISTER ALLOCATION [J].
BRIGGS, P ;
COOPER, KD ;
TORCZON, L .
ACM TRANSACTIONS ON PROGRAMMING LANGUAGES AND SYSTEMS, 1994, 16 (03) :428-455
[6]  
FAUTH A, 1995, CODE GENERATION EMBE, P138
[7]  
Fraser C. W., 1992, ACM Letters on Programming Languages and Systems, V1, P213, DOI 10.1145/151640.151642
[8]  
GEBOTYS C, 1997, P INT C COMP AID DES, P100
[9]   Improved approximation algorithms for maximum cut and satisfiability problems using semidefinite programming [J].
Goemans, MX ;
Williamson, DP .
JOURNAL OF THE ACM, 1995, 42 (06) :1115-1145
[10]  
Hadjiyiannis G, 1997, DES AUT CON, P299, DOI 10.1145/266021.266108