Design and Analysis of an Efficient High Holding Voltage SCR for ESD Protection

被引：0
|
作者：
Zhou, Zijie [1 ]
Jin, Xiangliang [1 ]
机构：
[1] Hunan Engn Lab Microelect Optoelect & Syst Chip, Xiangtan, Peoples R China
来源：
2017 IEEE ELECTRICAL DESIGN OF ADVANCED PACKAGING AND SYSTEMS SYMPOSIUM (EDAPS) | 2017年
基金：
中国国家自然科学基金;
关键词：
ESD; SCR; 3D simulation; Holding Voltage; CIRCUITS;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Silicon-Controlled Rectifier (SCR) is well known for its good robustness, but its deep Snapback makes it have a low holding voltage, it will bring a latch-up issue. An improving silicon-controlled rectifier (DSCR) device with higher holding voltage and smaller area is proposed and fabricated in a 0.5 pm HV CDMOS process. The 3D simulation results show that the DSCR has same working mechanism with SCR, and enlarging the D1 and D2 is effective to increase DSCR's holding voltage. TLP test results show that enlarging D1 and D2 to 8 pm makes the DSCR's holding voltage from 2.4 V to 7.95 V without increasing layout area.
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页数：3
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