AIM technology for non-volatile memories microelectronics devices

被引：6

作者：

Rigolli, Pier Luigi ^{[1
]}

Rozzoni, Laura ^{[1
]}

Turco, Catia ^{[1
]}

Iessi, Umberto ^{[1
]}

Polli, Marco ^{[2
]}

Kassel, Elyakim ^{[3
]}

Izikson, Pavel ^{[3
]}

Avrahamov, Yosef ^{[3
]}

机构：

[1] STMicroelectronics Srl, Via C Olivetti 2, I-20041 Agrate Brianza, MI, Italy

[2] KLA Tencor, I-20063 Cernusco Sul Naviglio, MI, Italy

[3] KLA Tencor, IL-23100 Migdal Haemeq, Israel

来源：

METROLOGY, INSPECTION, AND PROCESS CONTROL FOR MICROLITHOGRAPHY XX, PTS 1 AND 2 | 2006年 / 6152卷

关键词：

overlay metrology; copper; CMP; archer AIM;

D O I：

10.1117/12.656485

中图分类号：

TH7 [仪器、仪表];

学科分类号：

0804 ; 080401 ; 081102 ;

摘要：

Accurate and precise overlay metrology is a critical requirement in order to achieve high product yield in microelectronic manufacturing. Meeting the tighter overlay measurement error requirements for 90 nm technology and beyond is a dramatic challenge for optical metrology techniques using only conventional overlay marks like Bar in Bar (BiB) or Frame in Frames (FiF). New deficiencies, affecting traditional overlay marks, become evident as microlithography processes are developed for each new design rule node. The most serious problems are total measurement uncertainty, CMP process robustness, and device correlation. In this paper we will review the superior performances of grating-based AIM marks to provide a complete solution to control lithography overlay errors for new generation devices. Examples of successful application of AIM technology to FEOL and Cu-BEOL process steps of advanced non volatile memory devices manufacturing are illustrated. An additional advantage of the adoption of AIM marks is that the significant reduction of target noise versus conventional marks revealed systematic differences within the lithography cluster which were previously obscure offering a new tool to optimize litho cells. In this paper we demonstrated that AIM target architecture enables high performance metrology with design rule segmented targets - a prerequisite to have overlay marks fully compatible with design rule sensitive process steps.

引用

页数：13