Efficient RNS Implementation of Elliptic Curve Point Multiplication Over GF(p)

被引：58

作者：

Esmaeildoust, Mohammad ^{[1
]}

Schinianakis, Dimitrios ^{[2
]}

Javashi, Hamid ^{[3
]}

Stouraitis, Thanos ^{[2
]}

Navi, Keivan ^{[1
]}

机构：

[1] Shahid Beheshti Univ, Fac Elect & Comp Engn, Tehran 1983963113, Iran

[2] Univ Patras, Dept Elect & Comp Engn, Patras 13231, Greece

[3] Shahid Beheshti Univ, Microelect Lab, Tehran 1983963113, Iran

来源：

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS | 2013年 / 21卷 / 08期

关键词：

Elliptic curve cryptography (ECC); Montgomery multiplication; residue arithmetic; residue number system (RNS); ARCHITECTURE; PROCESSOR;

D O I：

10.1109/TVLSI.2012.2210916

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Elliptic curve point multiplication (ECPM) is one of the most critical operations in elliptic curve cryptography. In this brief, a new hardware architecture for ECPM over GF(p) is presented, based on the residue number system (RNS). The proposed architecture encompasses RNS bases with various word-lengths in order to efficiently implement RNS Montgomery multiplication. Two architectures with four and six pipeline stages are presented, targeted on area-efficient and fast RNS Montgomery multiplication designs, respectively. The fast version of the proposed ECPM architecture achieves higher speeds and the area-efficient version achieves better area-delay tradeoffs compared to state-of-the-art implementations.

引用

页码：1545 / 1549

页数：5

共 50 条

[31] Improved Elliptic Curve Cryptographic Processor for General Curves over GF(p) [J].

Chen, Chuanpeng ;

Qin, Zhongping .

2010 IEEE 10TH INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING PROCEEDINGS (ICSP2010), VOLS I-III, 2010, :1849-+

[32] Implementation of elliptic curve cryptographic coprocessor over GF(2m) on an FPGA [J].

Okada, S ;

Torii, N ;

Itoh, K ;

Takenaka, M .

CRYPTOGRAPHIC HARDWARE AND EMBEDDED SYSTEMS-CHES 2000, PROCEEDINGS, 2001, 1965 :25-40

[33] An Efficient Low-Latency Point-Multiplication Over Curve25519 [J].

Salarifard, Raziyeh ;

Bayat-Sarmadi, Siavash .

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2019, 66 (10) :3854-3862

[34] Area-Time Efficient Hardware Implementation of Modular Multiplication for Elliptic Curve Cryptography [J].

Islam, Md Mainul ;

Hossain, Md Selim ;

Shahjalal, Md ;

Hasan, Moh Khalid ;

Jang, Yeong Min .

IEEE ACCESS, 2020, 8 :73898-73906

[35] A Compact 3-Stage Pipelined Hardware Accelerator for Point Multiplication of Binary Elliptic Curves Over GF(2233) [J].

Hazzazi, Mohammad Mazyad ;

Rashid, Muhammad ;

Jamal, Sajjad Shaukat ;

Alblehai, Fahad ;

Nooh, Sameer ;

Rehman, Mujeeb Ur .

IEEE ACCESS, 2024, 12 :162510-162521

[36] High-performance Pipelined FPGA Implementation of the Elliptic Curve Cryptography over GF (2n) [J].

Harb, Salah ;

Ahmad, M. Omair ;

Swamy, M. N. S. .

PROCEEDINGS OF THE 16TH INTERNATIONAL JOINT CONFERENCE ON E-BUSINESS AND TELECOMMUNICATIONS, VOL 2: SECRYPT, 2019, :15-24

[37] An Area Aware Accelerator for Elliptic Curve Point Multiplication [J].

Imran, Malik ;

Pagliarini, Samuel ;

Rashid, Muhammad .

2020 27TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS), 2020,

[38] An efficient hardware implementation of the elliptic curve cryptographic processor over prime field, Fp [J].

Kudithi, Thirumalesu ;

Sakthivel, R. .

INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 2020, 48 (08) :1256-1273

[39] High-Performance Pipelined Architecture of Elliptic Curve Scalar Multiplication Over GF(2m) [J].

Li, Lijuan ;

Li, Shuguo .

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 24 (04) :1223-1232

[40] Implementation of Point Addition & Point Doubling for Elliptic Curve [J].

Panchbhai, Megha M. ;

Ghodeswar, U. S. .

2015 INTERNATIONAL CONFERENCE ON COMMUNICATIONS AND SIGNAL PROCESSING (ICCSP), 2015, :746-749

← 1 2 3 4 5 →