An innovative low-density parity-check code design with near-Shannon-limit performance and simple implementation

被引：24
作者：
Eroz, M [1 ]
Sun, FW [1 ]
Lee, LN [1 ]
机构：
[1] Hughes Netowrk Syst, Germantown, MD 20876 USA
来源：
IEEE TRANSACTIONS ON COMMUNICATIONS | 2006年 / 54卷 / 01期
关键词：
digital video broadcasting (DVB); high-order modulation; iterative decoding; low-density parity-check (LDPC) codes; very-large-scale integration (VLSI) implementation;
D O I：
10.1109/TCOMM.2005.861681
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A novel parity-check matrix design for low-density parity-check (C) codes is described. By eliminating the routing problem associated with LDPC codes, the design results in a small implementation area, and the codes have outstanding error-rate performance close to the Shannon limit for a wide range of code rates, from 1/4 to 9/10, and for various modulation schemes such as binary phase-shift keying (PSK), quaternary PSK, 8-PSK, 16-amplitude PSK (APSK), and 32-APSK. As a result, LDPC codes designed with this method have been standardized for next-generation digital video broadcasting.
引用
收藏
页码：13 / 17
页数：5
相关论文
共 13 条
  • [1] A highly efficient domain-programmable parallel architecture for iterative LDPCC decoding
    Al-Rawi, G
    Cioffi, J
    [J]. INTERNATIONAL CONFERENCE ON INFORMATION TECHNOLOGY: CODING AND COMPUTING, PROCEEDINGS, 2001, : 569 - 577
  • [2] Boutillon E., 2000, 2nd International Symposium on Turbo Codes and Related Topics. Proceedings, P459
  • [3] *ETSI, DIG VID BROADC 2 GEN
  • [4] LOW-DENSITY PARITY-CHECK CODES
    GALLAGER, RG
    [J]. IRE TRANSACTIONS ON INFORMATION THEORY, 1962, 8 (01): : 21 - &
  • [5] Jin H., 2000, INT S TURB COD REL T, P1
  • [6] LEE W, 2001, P ICECS, P1223
  • [7] MacKay D, 2003, Information Theory, Inference, and Learning Algorithms
  • [8] Near Shannon limit performance of low density parity check codes
    MacKay, DJC
    Neal, RM
    [J]. ELECTRONICS LETTERS, 1997, 33 (06) : 457 - 458
  • [9] Mansour MM, 2002, ISLPED'02: PROCEEDINGS OF THE 2002 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN, P284, DOI 10.1109/LPE.2002.1029622
  • [10] NARYANASWAMI R, 2001, THESIS TEXAS A M U C
12