Low-power static and dynamic high-voltage CMOS level-shifter circuits

被引：31

作者：

Khorasani, Maziyar ^{[1
]}

van den Berg, Leendert ^{[1
]}

Marshall, Philip ^{[1
]}

Zargham, Meysam ^{[1
]}

Gaudet, Vincent ^{[1
]}

Elliott, Duncan ^{[1
]}

Martel, Stephane ^{[2
]}

机构：

[1] Univ Alberta, Dept Elect & Comp Engn, Edmonton, AB, Canada

[2] DALSA Semiconduct Inc, Proc Integrat Dept, Bromont, PQ, Canada

来源：

PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10 | 2008年

基金：

加拿大自然科学与工程研究理事会;

关键词：

D O I：

10.1109/ISCAS.2008.4541825

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Pseudo-NMOS level-shifters consume large static current making them unsuitable for portable devices implemented with HV CMOS. Dynamic level-shifters help reduce power consumption. To reduce on-current to a minimum (sub-nanoamp), modifications are proposed to existing pseudo-NMOS and dynamic level-shifter circuits. A low power three transistor static level-shifter design with a resistive load is also presented.

引用

页码：1946 / +

页数：2

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