A novel open-loop high-speed CMOS sample-and-hold

被引：13

作者：

Mousazadeh, Morteza ^{[1
]}

Hadidi, Khayrollah ^{[1
]}

Khoei, Abdollah ^{[1
]}

机构：

[1] Urmia Univ, Microelect Res Lab, Orumiyeh 53139, West Azerbaijan, Iran

来源：

AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS | 2008年 / 62卷 / 08期

关键词：

sample and hold; ADC; charge injection; linearity;

D O I：

10.1016/j.aeue.2007.08.003

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A new open-loop high-speed CMOS sample-and-hold is presented. Based on new method for further reduction of voltage-dependent charge injection, a new CMOS sample-and-hold was designed. Simulation results confirm the effectiveness of this method. Over 10dB improvement in signal-to-noise ratio, compared to the signal-to-noise ratio of conventional bottom plate sampling S/Hs was achieved with this method. A comparison between newly designed S/H and the bottom-plate sampling S/H is presented. (c) 2007 Elsevier GmbH. All rights reserved.

引用

页码：588 / 596

页数：9

共 50 条

[31] A 1.2V Sample-and-Hold Circuit for 14-Bit 250MS/s Pipeline ADC in 65nm CMOS [J].

Wang Xuan ;

Li Fule ;

Wu Bin .

BUSINESS, ECONOMICS, FINANCIAL SCIENCES, AND MANAGEMENT, 2012, 143 :507-514

[32] Very high-speed BJT buffer for track-and-hold amplifiers with enhanced linearity [J].

Aksin, DY ;

Maloberti, F .

2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL V, PROCEEDINGS, 2002, :569-572

[33] Area, Power and Performance Analysis of High Speed Sample and Hold Circuit [J].

Jithin, P., V ;

Shekar, G. .

2017 INTERNATIONAL CONFERENCE ON MICROELECTRONIC DEVICES, CIRCUITS AND SYSTEMS (ICMDCS), 2017,

[34] A High Speed, Highly linear CMOS Fully Differential Track and Hold Circuit [J].

Nejad, Shaahin Haddadi ;

Kouzekanani, Ziaaddin Daie ;

Sobhi, Jafar ;

Fard, Iman Salami ;

Ghanbari, Kuresh .

SBCCI 2010: 23RD SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, PROCEEDINGS, 2010, :23-27

[35] An 8-bit 250MSPS CMOS pipelined ADC using open-loop architecture [J].

Koo, JH ;

Kim, YJ ;

Kim, SH ;

Yun, WJ ;

Lim, SI ;

Kim, S .

PROCEEDINGS OF 2004 IEEE ASIA-PACIFIC CONFERENCE ON ADVANCED SYSTEM INTEGRATED CIRCUITS, 2004, :94-97

[36] Design and Characteristics Measurement of a High-speed CMOS Imaging System [J].

Shang, Yuanyuan ;

Guan, Yong ;

Zhao, Xiaoxu ;

Zhang, Shudong ;

Liu, Hui .

IST: 2009 IEEE INTERNATIONAL WORKSHOP ON IMAGING SYSTEMS AND TECHNIQUES, 2009, :127-131

[37] A High-Speed Low-Distortion CMOS Source Follower Buffer [J].

Campos, M. V. ;

Reis Filho, C. A. .

IEEE LATIN AMERICA TRANSACTIONS, 2013, 11 (02) :677-681

[38] A Low-Voltage Submicrowatt, High-Speed CMOS Dynamic Comparator [J].

Shakibaee, Fatemeh ;

Gosselin, Benoit .

2023 21ST IEEE INTERREGIONAL NEWCAS CONFERENCE, NEWCAS, 2023,

[39] Novel High-speed Linear GaN Technology with High Efficiency [J].

Moon, Jeong-sun ;

Wong, Joel ;

Grabar, Bob ;

Antcliffe, Mike ;

Chen, Peter ;

Arkun, Erdem ;

Khalaf, Isaac ;

Corrion, Andrea ;

Post, Taylor .

2019 IEEE MTT-S INTERNATIONAL MICROWAVE SYMPOSIUM (IMS), 2019, :1130-1132

[40] A Novel Method to Synchronize High-Speed Data Converters [J].

Stackler, Marc ;

Bouin, Etienne ;

Laube, Remi ;

Ligozat, Jerome .

2016 IEEE RADAR CONFERENCE (RADARCONF), 2016, :1187-1191

← 1 2 3 4 5 →