CNFET-based design of resilient MCML XOR/XNOR circuit at 16-NM technology node

被引:0
|
作者
Srivastava, Pragya [1 ]
Islam, Aminul [1 ]
机构
[1] Birla Inst Technol, Dept Elect & Commun Engn, Ranchi 835215, Bihar, India
关键词
CNFET; EDP; MOS current mode logic; Power delay Product; Propagation delay (t(p)); Variability; FIELD-EFFECT TRANSISTORS; COMPACT SPICE MODEL; INCLUDING NONIDEALITIES;
D O I
暂无
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
Due to aggressive scaling, CMOS technology is facing a few critical issues. Few of them are variability, subthreshold leakage, gate leakage, and short-channel effects. Variability has become a metric of equal importance as power, delay, and area in deep submicron technology node. Therefore, this paper carries out power delay product (PDP) variability analysis of MOS current mode logic (MCML) and CMOS inverter/buffer and XOR/XNOR circuits in addition to propagation delay (t(p)), average power (PWR), power-delay product (PDP) and energy-delay product (EDP) analysis at 16-nm technology node. MCML inverter/buffer (XOR/XNOR) circuits prove their robustness by exhibiting 1.66x (1.82x) improvement in PDP variability at nominal supply voltage of V-DD = 0.7 V. Therefore, this work realizes XOR/XNOR circuit using carbon nanotube field effect transistor (CNFET). CNFET based MCML XOR/XNOR circuit exhibits lower t(p) (by 91.20x), lower PDP (by 3.15x) and lower EDP (by 287.69x) compared to MOSFET based MCML XOR/XNOR at nominal V-DD.
引用
收藏
页码:261 / 267
页数:7
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