Hybrid Evolutionary Design Space Exploration Algorithm With Defence Against Third Party IP Vulnerabilities

被引:3
作者
Rajmohan, Shathanaa [1 ]
Ramasubramanian, N. [1 ]
Naganathan, Nagi [2 ]
机构
[1] Natl Inst Technol Tiruchirappalli, Dept Comp Sci & Engn, Tiruchirappalli 620015, India
[2] Broadcom Ltd, Allentown, PA 18109 USA
关键词
Trojan horses; Hardware; Space exploration; Integrated circuits; IP networks; Consumer electronics; Redundancy; Design space exploration (DSE); evolutionary algorithm; hardware trojan; high level synthesis (HLS); HARDWARE TROJAN ATTACKS; HIGH-LEVEL SYNTHESIS; GENETIC ALGORITHM; CIRCUITS;
D O I
10.1109/TCAD.2019.2960340
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
With the globalization of the semiconductor industry, the supply chain is fragmented across geographies, which has resulted in the importing of third-party IP cores in designs. Such third party IP cores have increased concerns about hardware Trojans. To address such concerns, development of an effective Trojan detection methodology is crucial. In this article, we present a low-cost Trojan detection and activation prevention mechanism for high level synthesis. In particular, a particle swarm optimization-based design space exploration method is proposed which is combined with a Trojan detection mechanism to minimize resource requirements. Additionally, a hybrid evolutionary algorithm-based Trojan detection method is formed with a novel vendor allocation procedure to find low-cost solutions. The proposed algorithm is compared with existing methods-based on Pareto and non-Pareto-based evaluations to verify their efficiency. From the experiment results, it has been verified that the proposed algorithm offers defence against Trojans similar to existing algorithms with less hardware overhead.
引用
收藏
页码:2602 / 2614
页数:13
相关论文
共 45 条
  • [1] [Anonymous], 2014, EXPR BENCHM SUIT
  • [2] [Anonymous], 2000, WATER SCI, DOI DOI 10.1007/S13201-020-01352-7
  • [3] Auger A, 2009, FOGA'09: PROCEEDINGS OF THE 10TH ACM SIGRVO CONFERENCE ON FOUNDATIONS OF GENETIC ALGORITHMS, P87
  • [4] Banga Mainak, 2010, 2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2010), P56, DOI 10.1109/HST.2010.5513114
  • [5] Temperature Tracking: Toward Robust Run-Time Detection of Hardware Trojans
    Bao, Chongxi
    Forte, Domenic
    Srivastava, Ankur
    [J]. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2015, 34 (10) : 1577 - 1585
  • [6] A case study in hardware Trojan design and implementation
    Baumgarten, Alex
    Steffen, Michael
    Clausman, Matthew
    Zambreno, Joseph
    [J]. INTERNATIONAL JOURNAL OF INFORMATION SECURITY, 2011, 10 (01) : 1 - 14
  • [7] Becker GT, 2013, LECT NOTES COMPUT SC, V8086, P197, DOI 10.1007/978-3-642-40349-1_12
  • [8] Hardware Trojan Horses in Cryptographic IP Cores
    Bhasin, Shivam
    Danger, Jean-Luc
    Guilley, Sylvain
    Xuan Thuy Ngo
    Sauvage, Laurent
    [J]. 2013 10TH WORKSHOP ON FAULT DIAGNOSIS AND TOLERANCE IN CRYPTOGRAPHY (FDTC 2013), 2013, : 15 - 29
  • [9] Hardware Trojan Attacks: Threat Analysis and Countermeasures
    Bhunia, Swarup
    Hsiao, Michael S.
    Banga, Mainak
    Narasimhan, Seetharam
    [J]. PROCEEDINGS OF THE IEEE, 2014, 102 (08) : 1229 - 1247
  • [10] Protection Against Hardware Trojan Attacks: Towards a Comprehensive Solution
    Bhunia, Swarup
    Abramovici, Miron
    Agrawal, Dakshi
    Bradley, Paul
    Hsiao, Michael S.
    Plusquellic, Jim
    Tehranipoor, Mohammad
    [J]. IEEE DESIGN & TEST, 2013, 30 (03) : 6 - 17