Gate Stack Process Optimization for TDDB Improvement in 28nm High-k/Metal Gate nMOSFETs

被引：0

作者：

Lee, Kyong Taek ^{[1
]}

Kim, Hyunjin ^{[1
]}

Park, Junekyun ^{[1
]}

Park, Jongwoo ^{[1
]}

机构：

[1] Samsung Elect, Syst LSI Div, Technol Reliabil, Yongin 446711, Gyeonggi Do, South Korea

来源：

2012 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS) | 2012年

关键词：

RELIABILITY;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The effects of IL (interfacial layer) thickness and nitrogen concentration of high-k layer on TDDB are comprehensively investigated for HK/MG nMOSFETs. Comparison of the TDDB characteristics based on IL thickness splits manifests that thick IL device exhibits longer failure time and lower SILC augment due to reduction of IL tunneling rate of electron. However, the gate leakage current of thick IL device is aggravated by decrease of total physical oxide thickness even for the same EOT due mainly to thinner HK thickness. Since SILC behavior is attributed to the bulk transient charge trapping by pre-existing defects in HK, the process optimization to reduce bulk defects in HK is a critical solution to improve TDDB in HK/MG nMOSFETs. In addition, nitridation process after HK deposition contributes to passivate oxygen vacancies in the gate dielectrics and removes electron leakage path driven by oxygen vacancies. Hence, nMOSFET with higher nitrogen concentration shows improved TDDB reliability without compromise in DC characteristics and the power law voltage acceleration factor.

引用

页数：4

共 44 条

[31] The Observation of Width Quantization Impact on Device Performance and Reliability for High-k/Metal Tri-Gate FinFET [J].

Yeh, Wen-Kuan ;

Zhang, Wenqi ;

Yang, Yi-Lin ;

Dai, An-Ni ;

Wu, Kehuey ;

Chou, Tung-Huan ;

Lin, Cheng-Li ;

Gan, Kwang-Jow ;

Shih, Chia-Hung ;

Chen, Po-Ying .

IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 2016, 16 (04) :610-616

[32] The Study on Width Quantization impact on Device Performance and Reliability for high-k/metal Tri-Gate FinFET [J].

Yeh, Wen-Kuan ;

Zhang, Wenqi ;

Yang, Yi-Lin .

PROCEEDINGS OF THE 2015 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC), 2015, :563-566

[33] The Impact of TiN Barrier on the NBTI in an Advanced High-k Metal-gate p-channel MOSFET [J].

Huang, D. -C. ;

Hsieh, E. Ray ;

Gong, J. ;

Huang, C. -F. ;

Chung, Steve S. .

2017 IEEE 24TH INTERNATIONAL SYMPOSIUM ON THE PHYSICAL AND FAILURE ANALYSIS OF INTEGRATED CIRCUITS (IPFA), 2017,

[34] Channel Hot-Carrier Degradation in Short-Channel Transistors With High-k/Metal Gate Stacks [J].

Amat, Esteve ;

Kauerauf, Thomas ;

Degraeve, Robin ;

De Keersgieter, An ;

Rodriguez, Rosana ;

Nafria, Montserrat ;

Aymerich, Xavier ;

Groeseneken, Guido .

IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 2009, 9 (03) :425-430

[35] Reliability characteristics of high-K gate dielectrics HfO2 in metal-oxide semiconductor capacitors [J].

Han, DD ;

Kang, JF ;

Lin, CH ;

Han, RQ .

MICROELECTRONIC ENGINEERING, 2003, 66 (1-4) :643-647

[36] Reliability Studies of a 32nm System-on-Chip (SoC) Platform Technology with 2nd Generation High-K/Metal Gate Transistors [J].

Rahman, A. ;

Agostinelli, M. ;

Bai, P. ;

Curello, G. ;

Deshpande, H. ;

Hafez, W. ;

Jan, C. -H. ;

Komeyli, K. ;

Park, J. ;

Phoa, K. ;

Tsai, C. ;

Yeh, J. -Y. ;

Xu, J. .

2011 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2011,

[37] Optimization of ALD High-k Gate Dielectric to Improve AlGaN/GaN MOS-HFET DC Characteristics and Reliability [J].

Azam, Faisal ;

Lee, Bongmook ;

Misra, Veena .

2017 IEEE 5TH WORKSHOP ON WIDE BANDGAP POWER DEVICES AND APPLICATIONS (WIPDA), 2017, :39-43

[38] Low-Frequency-Noise-Based Oxide Trap Profiling in Replacement High-k/Metal-Gate pMOSFETs [J].

Simoen, E. ;

Lee, J. W. ;

Veloso, A. ;

Paraschiv, V. ;

Horiguchi, N. ;

Claeys, C. .

ULSI PROCESS INTEGRATION 8, 2013, 58 (09) :281-292

[39] Impact of the TiN barrier layer on the positive bias temperature instabilities of high-k/metal-gate field effect transistors [J].

Huang, Da-Cheng ;

Gong, Jeng ;

Huang, Chih-Fang ;

Chung, Steve S. .

JAPANESE JOURNAL OF APPLIED PHYSICS, 2015, 54 (04)

[40] The Study of Mobility-Tinv Trade-off in Deeply Scaled High-k/Metal Gate Devices and Scaling Design Guideline for 22nm-node Generation [J].

Goto, Masakazu ;

Kawanaka, Shigeru ;

Inumiya, Seiji ;

Kusunoki, Naoki ;

Saitoh, Masumi ;

Tatsumura, Kosuke ;

Kinoshita, Atsuhiro ;

Inaba, Satoshi ;

Toyoshima, Yoshiaki .

2009 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, 2009, :214-+

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